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NCP1631
60 m
f osc ^
C OSC ) 10 p
? However, the coil current can possibly be non
zero when the clock signal turns high. The
circuit would enter Continuous Conduction
Mode (CCM) if the MOSFET turned on in that
moment. In order to avoid CCM operation, the
clock is prevented from setting the PWM latch
until the core is reset (that is as low as “V ZCD ”
of Figure 8 is low). The clock signal remains
high during this waiting phase (refer to
Figure 12). Hence the next MOSFET
conduction time occurs as soon as the coil
current has totally vanished. In other words,
critical conduction mode (CrM) operation is
obtained.
The clamp frequency can be computed using the
following equation:
(eq. 17)
where C OSC is the pin 4 external capacitor and C pin the pin
4 parasitic capacitance (about 10 pF).
FFOLD
R FF
I FF
V REGUL
pfcOK
I FF
Current
Mirror
105 m A
V REGUL
Circuitry for
Frequency Foldback
SYNCbar
DRV 1
R
SYNCbar
CL K1
S
OS C
I OSC(CH) = I FF
I OSC(clamp)
Co mp _OSC
SYNC
CLK1
Ge nera tion
latch
Q
Q_ph1
C OSC
V OSC(high) /
V OSC(low)
DRV 2
I OSC(DISCH) = I FF
divider
by tw o
R
CLK2
Ge nera tion
latch
Q_ph2
Q_ph2
Q_ph1
Figure 16. Oscillator Block
http://onsemi.com
16
S
Q
SYNCbar
CL K2
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